Field of the Invention
This invention relates to a circuit for measuring a transmission quality of a digital signal reproduced in a digital demodulator, in which an input carrier wave modulated and transmitted under a carrier modulation transmission system is received and is demodulated to reproduce an original digital signal. The present invention is preferably applied to a digital demodulator, in which a phase modulated carrier wave (Phase Shift Keying) or quadrature amplitude modulated (QAM) carrier wave is subjected to a quadrature synchronous detection to reproduce an original digital signal. In particular, the circuit according to the present invention is designed to measure a carrier-to-noise ratio (CN ratio) or a bit error rate (BER) of the reproduced digital signal.
In a digital demodulator for reproducing an original digital signal by demodulating a received input carrier wave which is modulated under the carrier modulation transmission system, in order to detect the CN ratio, a carrier power is generally measured. To this end, the non-modulated carrier has to be transmitted or the measurement has to be effected for a relatively long time to detect a peak of the carrier wave as the power of the carrier. Therefore, it is impossible to perform the measurement of the CN ratio on a real time. Furthermore, in order to conduct such an measurement, the apparatus is liable to become complicated and expensive, because it is necessary to provide filters for extracting the carrier and noise, power meter and spectrum analyzer.
Moreover, in order to measure the BER, the transmission of the information has to be interrupted or a specific bit array has to be inserted within an information bit stream. This apparently results in an undesired decrease in the transmission efficiency. Further, when BER is small, the measurement requires a quite long time.
In Japanese Patent Publication Kokai Hei 5-113459, there is described a known CN measuring circuit which can remove some of the above explained drawbacks. This known CN measuring circuit is based on a recognition that the conventional digital demodulator for demodulating the modulated carrier wave usually includes an error correction circuit. Then, the number of errors of the digital signal or the number of error correcting operations or the number of data interpolating operations occurring within a predetermined time period is counted to derive an error count, and a carrier-to-noise ratio is calculated from the thus obtained error count with reference to a previously determined and stored relationship between various error counts and carrier-to-noise ratios.
In the known transmission quality measuring circuit described in the above mentioned Japanese Patent Publication Kokai Hei 5-113459, it is possible to measure the CN ratios substantially on the real time and can be constructed simple in construction and less expensive in cost, because it is no more required to provide the power meter and filters. However, since the CN ratio is estimated on the basis of the number of errors of the digital signal or the number of error correcting operations or the number of data interpolating operations occurring within the predetermined time period, when the CN ratio is relatively small, a reliable measurement could not be carried out unless said time period is set to a relatively long time. Then, it is no more possible to perform the measurement on the real time. For instance, if an error rate for a transmission rate of 10.sup.6 symbols per second is assumed to 10.sup.-10, an error of one symbol will occur for an average time period of ten thousands (10.sup.4) seconds. Then, in order to measure the CN ratio under such a condition, it is necessary to set the time period to an extremely long time period. Moreover, the known measuring circuit operates on the basis of the error detection or error correction, the number of redundant bits has to be increased for the correction, and thus the transmission efficiency is liable to be decreased.